O8(L(mediatek,mt8183-pumpkinmediatek,mt8183 +7Pumpkin MT8183aliases=/soc/i2c@11007000B/soc/i2c@11011000G/soc/i2c@11009000L/soc/i2c@1100f000Q/soc/i2c@11008000V/soc/i2c@11016000[/soc/i2c@11005000`/soc/i2c@1101a000e/soc/i2c@1101b000j/soc/i2c@11014000o/soc/i2c@11015000u/soc/i2c@11017000{/soc/ovl@14008000/soc/ovl@14009000/soc/ovl@1400a000/soc/rdma@1400b000/soc/rdma@1400c000/soc/serial@11002000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53psci T cpu@1cpuarm,cortex-a53psci T cpu@2cpuarm,cortex-a53psci T cpu@3cpuarm,cortex-a53psci T cpu@100cpuarm,cortex-a73psci cpu@101cpuarm,cortex-a73psci cpu@102cpuarm,cortex-a73psci cpu@103cpuarm,cortex-a73psci  idle-states&pscicpu-sleeparm,idle-state3D[l|  cluster-sleep-0arm,idle-state3D[l| cluster-sleep-1arm,idle-state3D[l| opp_table0operating-points-v2?opp-300000000 h Popp-320000000 Popp-340000000C < Popp-360000000u* Ҧ Popp-380000000W  Popp-400000000ׄ z Popp-420000000  Popp-460000000k  L Popp-500000000e } Popp-540000000 / ` Popp-580000000" 4 Popp-620000000$s  Popp-653000000&@ YF Popp-698000000) Aopp-743000000,IG  6opp-800000000/ Hpmu-a53arm,cortex-a53-pmu pmu-a73arm,cortex-a73-pmu psci arm,psci-1.0smcfixed-factor-clock-13mfixed-factor-clockclk13moscillator fixed-clockclk26mtimerarm,armv8-timer @   soc+ simple-bussoc_data@8000000%mediatek,mt8183-efusemediatek,efuse+  disabledinterrupt-controller@c000000 arm,gic-v3 #P   @ A B  ppi-partitionsinterrupt-partition-08interrupt-partition-18 syscon@c530000mediatek,mt8183-mcucfgsyscon Sinterrupt-controller@c530a80.mediatek,mt8183-sysirqmediatek,mt6577-sysirq#  S Psyscon@10000000 mediatek,mt8183-topckgensysconsyscon@10001000 mediatek,mt8183-infracfgsysconAsyscon@10003000mediatek,mt8183-pericfgsyscon04pinctrl@10005000mediatek,mt8183-pinctrlPDNiocfg0iocfg1iocfg2iocfg3iocfg4iocfg5iocfg6iocfg7iocfg8eintXht# i2c0&pins_i2cRSi2c10pins_i2cQTi2c2(pins_i2cghi2c3/pins_i2c23i2c4'pins_i2ciji2c51pins_i2c01i2c6%pins_cmd_datqrmmc0-pins-default5pins_cmd_dat${}~zpins_clk| pins_rstmmc0-pins-uhs6pins_cmd_dat${}~zpins_clk| pins_ds pins_rstmmc1-pins-default9pins_cmd_dat "! pins_clk pins_pmummc1-pins-uhs:pins_cmd_dat "! pins_clk syscon@10006000sysconsimple-mfd`power-controller!mediatek,mt8183-power-controller+.power-domain@0 /7 audioaudio1audio2power-domain@1power-domain@2 mfg+power-domain@3+)power-domain@4power-domain@5power-domain@6power-domain@7X 5 mmmm-0mm-1mm-2mm-3mm-4mm-5mm-6mm-7mm-8mm-97+power-domain@8@ . camcam-0cam-1cam-2cam-3cam-4cam-5cam-67power-domain@9 "  ispisp-0isp-17power-domain@10 7power-domain@11 7power-domain@12 @&#- vpuvpu1vpu-0vpu-1vpu-2vpu-3vpu-4vpu-57+power-domain@13 $ vpu2power-domain@14% vpu3watchdog@10007000mediatek,mt8183-wdtpAsyscon@1000c000"mediatek,mt8183-apmixedsyssyscon*pwrap@1000d000mediatek,mt8183-pwrapNpwrap )  spiwrapmt6358mediatek,mt6358# mt6358codecmediatek,mt6358-soundmt6358regulatormediatek,mt6358-regulatorbuck_vdram1Dvdram1S kL0buck_vcoreDvcoreS kjbuck_vpaDvpaS k7Pbuck_vproc11Dvproc11S kjbuck_vproc12Dvproc12S kj buck_vgpuDvgpuS kjbuck_vs2Dvs2S kL0buck_vmodemDvmodemS kjbuck_vs1Dvs1SB@k'{l0ldo_vdram2Dvdram2S 'kw@ ldo_vsim1Dvsim1Sk/M`ldo_vibrDvibrSOk2Z<ldo_vrf12regulator-fixedDvrf12SOkOxldo_vio18regulator-fixedDvio18Sw@kw@ 8ldo_vusbDvusbS-k/M`ldo_vcamioregulator-fixedDvcamioSw@kw@Eldo_vcamdDvcamdS kw@Eldo_vcn18regulator-fixedDvcn18Sw@kw@ldo_vfe28regulator-fixedDvfe28S*k*ldo_vsram_proc11 Dvsram_proc11S kjldo_vcn28regulator-fixedDvcn28S*k*ldo_vsram_others Dvsram_othersS kjldo_vsram_gpu Dvsram_gpuS kj@ldo_vxo22regulator-fixedDvxo22S!k!xldo_vefuseDvefuseSkldo_vaux18regulator-fixedDvaux18Sw@kw@ldo_vmchDvmchS,@ k2Z<;ldo_vbif28regulator-fixedDvbif28S*k*ldo_vsram_proc12 Dvsram_proc12S kjldo_vcama1Dvcama1Sw@k-Eldo_vemcDvemcS,@ k2Z<7ldo_vio28regulator-fixedDvio28S*k*ldo_va12regulator-fixedDva12SOkOldo_vrf18regulator-fixedDvrf18Sw@kw@xldo_vcn33_bt Dvcn33_btS2Zk5gldo_vcn33_wifi Dvcn33_wifiS2Zk5gldo_vcama2Dvcama2Sw@k-Eldo_vmcDvmcSw@k2Z<<ldo_vldo28Dvldo28S*k-ldo_vaud28regulator-fixedDvaud28S*k*ldo_vsim2Dvsim2Sk/M`mt6358rtcmediatek,mt6358-rtcscp@10500000mediatek,mt8183-scp P\ Nsramcfg  main okaytimer@10017000,mediatek,mt8183-timermediatek,mt6765-timerp iommu@10205000mediatek,mt8183-m4u P  !"#$Bmailbox@10238000mediatek,mt8183-gce#@   gceAauxadc@11001000.mediatek,mt8183-auxadcmediatek,mt8173-auxadc# main okay)serial@11002000*mediatek,mt8183-uartmediatek,mt6577-uart  [   baudbus okayserial@11003000*mediatek,mt8183-uartmediatek,mt6577-uart0 \   baudbus  disabledserial@11004000*mediatek,mt8183-uartmediatek,mt6577-uart@ ]   baudbus  disabledi2c@11005000mediatek,mt8183-i2c P WW*  maindma+ okay(default6%i2c@11007000mediatek,mt8183-i2c p Q *  maindma+ okay(default6&i2c@11008000mediatek,mt8183-i2c  R *G  maindmaarb+ okay(default6'i2c@11009000mediatek,mt8183-i2c  S *I  maindmaarb+ okay(default6(spi@1100a000mediatek,mt8183-spi+ x6 parent-clksel-clkspi-clk  disabledthermal@1100b000@mediatek,mt8183-thermal #  thermauxadcV L])m*+calibration-data,thermal-zonescpu_thermald,tripstrip-point0 passivetrip-point18passive-cpu-crit8 criticalcooling-mapsmap0-0 map1-0 tzts1,tripscooling-mapstzts2,tripscooling-mapstzts3,tripscooling-mapstzts4,tripscooling-mapstzts5,tripscooling-mapstztsABB,tripscooling-mapspwm@1100e000mediatek,mt8183-disp-pwm .*5 mainmmpwm@11006000mediatek,mt8183-pwm`*0 topmainpwm1pwm2pwm3pwm4i2c@1100f000mediatek,mt8183-i2c  T *  maindma+ okay(default6/spi@11010000mediatek,mt8183-spi+ |68 parent-clksel-clkspi-clk  disabledi2c@11011000mediatek,mt8183-i2c  U9*  maindma+ okay(default60spi@11012000mediatek,mt8183-spi+  6; parent-clksel-clkspi-clk  disabledspi@11013000mediatek,mt8183-spi+0 6< parent-clksel-clkspi-clk  disabledi2c@11014000mediatek,mt8183-i2c @ H*G  maindmaarb+  disabledi2c@11015000mediatek,mt8183-i2c P J*I  maindmaarb+  disabledi2c@11016000mediatek,mt8183-i2c ` VD*E  maindmaarb+ okay(default61i2c@11017000mediatek,mt8183-i2c p F*E  maindmaarb+  disabledspi@11018000mediatek,mt8183-spi+ 6K parent-clksel-clkspi-clk  disabledspi@11019000mediatek,mt8183-spi+ 6L parent-clksel-clkspi-clk  disabledi2c@1101a000mediatek,mt8183-i2c  Xb*  maindma+  disabledi2c@1101b000mediatek,mt8183-i2c  Yc*  maindma+  disabledusb@11201000#mediatek,mt8183-mtu3mediatek,mtu3  . > Nmacippc H523=Z sys_ckref_ck :4 e+  disabledusb@11200000'mediatek,mt8183-xhcimediatek,mtk-xhci Nmac I=Z sys_ckref_ck  disabledsyscon@11220000 mediatek,mt8183-audiosyssyscon"mmc@11230000mediatek,mt8183-mmc # M sourcehclksource_cg okay(defaultstate_uhs65Q6[e s(78Ummc@11240000mediatek,mt8183-mmc $ N ( sourcehclksource_cg okay(defaultstate_uhs69Q:[e 0=KX;<_udsi-phy@11e50000mediatek,mt8183-mipi-tx* mipi_tx0_pll=calibration-dataCefuse@11f10000%mediatek,mt8183-efusemediatek,efuse+calib@180 +calib@190 =t-phy@11f40000.mediatek,mt8183-tphymediatek,generic-tphy-v2+ okayusb-phy@0 ref okay2usb-phy@700  ref okay3syscon@13000000mediatek,mt8183-mfgcfgsyscon>gpu@13040000&mediatek,mt8183-maliarm,mali-bifrost@$ jobmmugpu>...core0core1core2?@syscon@14000000mediatek,mt8183-mmsyssysconAAAovl@14008000mediatek,mt8183-disp-ovl .BAovl@14009000mediatek,mt8183-disp-ovl-2l .BAovl@1400a000mediatek,mt8183-disp-ovl-2l .BArdma@1400b000mediatek,mt8183-disp-rdma .B&Ardma@1400c000mediatek,mt8183-disp-rdma .B&Acolor@1400e0006mediatek,mt8183-disp-colormediatek,mt8173-disp-color .Accorr@1400f000mediatek,mt8183-disp-ccorr .Aaal@140100002mediatek,mt8183-disp-aalmediatek,mt8173-disp-aal .Agamma@14011000mediatek,mt8183-disp-gamma .Adither@14012000mediatek,mt8183-disp-dither  .A dsi@14014000mediatek,mt8183-dsi@ .>@ C enginedigitalhs5CRdphy  disabledmutex@14016000mediatek,mt8183-disp-mutex` .\larb@14017000mediatek,mt8183-smi-larbp7. apbsmismi@14019000mediatek,mt8183-smi-common  apbsmigals0gals1.syscon@15020000mediatek,mt8183-imgsyssysconlarb@15021000mediatek,mt8183-smi-larb7    apbsmigals. #larb@1502f000mediatek,mt8183-smi-larb7   apbsmigals.  syscon@16000000mediatek,mt8183-vdecsyssysconDlarb@16010000mediatek,mt8183-smi-larb7DD apbsmi. syscon@17000000mediatek,mt8183-vencsyssysconElarb@17010000mediatek,mt8183-smi-larb7EE apbsmi. "syscon@19000000 mediatek,mt8183-ipu_connsysconsyscon@19010000mediatek,mt8183-ipu_adlsysconsyscon@19180000!mediatek,mt8183-ipu_core0sysconsyscon@19280000!mediatek,mt8183-ipu_core1syscon(syscon@1a000000mediatek,mt8183-camsyssysconlarb@1a001000mediatek,mt8183-smi-larb7  apbsmigals.$larb@1a002000mediatek,mt8183-smi-larb 7    apbsmigals.!memory@40000000memory@chosenpserial0:921600n8reserved-memory+scp_mem_region@50000000shared-dma-poolP|leds gpio-ledsled-redred offled-greengreen offntcmurata,ncp03wf104w@p) compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11ovl0ovl-2l0ovl-2l1rdma0rdma1serial0cpudevice_typeregenable-methodcapacity-dmips-mhzcpu-idle-statesdynamic-power-coefficient#cooling-cellsproc-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltinterrupts#clock-cellsclocksclock-divclock-multclock-output-namesclock-frequencyrangesstatus#interrupt-cellsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxmediatek,pull-up-advmediatek,drive-strength-advinput-enabledrive-strengthmediatek,pull-down-advoutput-high#power-domain-cellsclock-namesmediatek,infracfgdomain-supplymediatek,smiregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-always-onregulator-allowed-modesmemory-regionmediatek,larbs#iommu-cells#mbox-cells#io-channel-cellspinctrl-namespinctrl-0#thermal-sensor-cellsresetsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namespolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionpower-domains#pwm-cellsphysmediatek,syscon-wakeuppinctrl-1bus-widthmax-frequencycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vcap-mmc-hw-resetno-sdiono-sdhs400-ds-delayvmmc-supplyvqmmc-supplyassigned-clocksassigned-clock-parentsnon-removablecap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104cap-sdio-irqno-mmckeep-power-in-suspendenable-sdio-wakeup#phy-cellsmediatek,discthinterrupt-namespower-domain-namesoperating-points-v2mali-supplysram-supplymboxesmediatek,gce-client-regiommusmediatek,larbmediatek,rdma-fifo-sizemediatek,syscon-dsiphy-namesmediatek,gce-eventsstdout-pathno-maplabelgpiosdefault-statepullup-uvpullup-ohmpulldown-ohmio-channels