)8'l("'4$mediatek,mt8192-evbmediatek,mt8192 +!7MediaTek MT8192 evaluation boardoscillator0 fixed-clock=JZclk26mmoscillator1 fixed-clock=JZclk32kcpus+cpu@0ucpuarm,cortex-a55psciJec3@m cpu@100ucpuarm,cortex-a55psciJec3@m cpu@200ucpuarm,cortex-a55psciJec3@m cpu@300ucpuarm,cortex-a55psciJec3@m cpu@400ucpuarm,cortex-a76psciJfm cpu@500ucpuarm,cortex-a76psciJfmcpu@600ucpuarm,cortex-a76psciJfmcpu@700ucpuarm,cortex-a76psciJfmcpu-mapcluster0core0 core1 core2 core3 core4 core5core6core7l2-cache0cacheml2-cache1cacheml3-cachecachemidle-statespscicpu-sleep-larm,idle-state7%5 mcpu-sleep-barm,idle-state#%5mcluster-sleep-larm,idle-state<%5\mcluster-sleep-barm,idle-state(%5 mpmu-a55arm,cortex-a55-pmu Fpmu-a76arm,cortex-a76-pmu Fpsci arm,psci-1.0smctimerarm,armv8-timer @F   J]@soc+ simple-busQperformance-controller@11bc10mediatek,cpufreq-hw  0 Xminterrupt-controller@c000000 arm,gic-v3r    F mppi-partitionsinterrupt-partition-0 minterrupt-partition-1 mpinctrl@10005000mediatek,mt8192-pinctrlP]iocfg0iocfg_rmiocfg_bmiocfg_bliocfg_briocfg_lmiocfg_lbiocfg_rtiocfg_ltiocfg_tleintFrmtimer@10017000,mediatek,mt8192-timermediatek,mt6765-timerpFclk13mserial@11002000*mediatek,mt8192-uartmediatek,mt6577-uart Fm baudbusokayserial@11003000*mediatek,mt8192-uartmediatek,mt6577-uart0Fn baudbus disabledspi@1100a000(mediatek,mt8192-spimediatek,mt6765-spi+F parent-clksel-clkspi-clk disabledspi@11010000(mediatek,mt8192-spimediatek,mt6765-spi+F parent-clksel-clkspi-clk disabledspi@11012000(mediatek,mt8192-spimediatek,mt6765-spi+ F parent-clksel-clkspi-clk disabledspi@11013000(mediatek,mt8192-spimediatek,mt6765-spi+0F parent-clksel-clkspi-clk disabledspi@11018000(mediatek,mt8192-spimediatek,mt6765-spi+F parent-clksel-clkspi-clk disabledspi@11019000(mediatek,mt8192-spimediatek,mt6765-spi+F parent-clksel-clkspi-clk disabledspi@1101d000(mediatek,mt8192-spimediatek,mt6765-spi+F parent-clksel-clkspi-clk disabledspi@1101e000(mediatek,mt8192-spimediatek,mt6765-spi+F parent-clksel-clkspi-clk disabledspi@11234000mediatek,mt8192-nor#@F  spisfaxi+ disabledi2c3@11cb0000mediatek,mt8192-i2c !sFs maindma+ disabledi2c7@11d00000mediatek,mt8192-i2c !vFw maindma+ disabledi2c8@11d01000mediatek,mt8192-i2c !wFx maindma+ disabledi2c9@11d02000mediatek,mt8192-i2c  !yFy maindma+ disabledi2c1@11d20000mediatek,mt8192-i2c !qFq maindma+ disabledi2c2@11d21000mediatek,mt8192-i2c !qFr maindma+ disabledi2c4@11d22000mediatek,mt8192-i2c  !sFt maindma+ disabledi2c5@11e00000mediatek,mt8192-i2c !uFu maindma+ disabledi2c0@11f00000mediatek,mt8192-i2c !pFp maindma+ disabledi2c6@11f01000mediatek,mt8192-i2c !uFv maindma+ disabledaliases/soc/serial@11002000chosenserial0:921600n8memory@40000000umemory@ compatibleinterrupt-parent#address-cells#size-cellsmodel#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodcpu-idle-statesnext-level-cacheperformance-domainscapacity-dmips-mhzcpuentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usinterruptsranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controlleraffinityreg-namesgpio-controller#gpio-cellsgpio-rangesclocksclock-namesstatusclock-divserial0stdout-path