u8m\(m$ ,PHYTEC phyBOARD-Pollux i.MX8MPG2phytec,imx8mp-phyboard-pollux-rdkphytec,imx8mp-phycore-somfsl,imx8mpaliases&=/soc@0/bus@30800000/ethernet@30be0000&G/soc@0/bus@30800000/ethernet@30bf0000"Q/soc@0/bus@30000000/gpio@30200000"W/soc@0/bus@30000000/gpio@30210000"]/soc@0/bus@30000000/gpio@30220000"c/soc@0/bus@30000000/gpio@30230000"i/soc@0/bus@30000000/gpio@30240000!o/soc@0/bus@30800000/i2c@30a20000!t/soc@0/bus@30800000/i2c@30a30000!y/soc@0/bus@30800000/i2c@30a40000!~/soc@0/bus@30800000/i2c@30a50000!/soc@0/bus@30800000/i2c@30ad0000!/soc@0/bus@30800000/i2c@30ae0000!/soc@0/bus@30800000/mmc@30b40000!/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b60000$/soc@0/bus@30800000/serial@30860000$/soc@0/bus@30800000/serial@30890000$/soc@0/bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30bb0000(/soc@0/bus@30800000/i2c@30a20000/rtc@52./soc@0/bus@30000000/snvs@30370000/snvs-rtc-lpcpus cpu@0cpu2arm,cortex-a53lpsci @*7@IVg sspeed_grade cpu@1cpu2arm,cortex-a53lpsci @*7@IV cpu@2cpu2arm,cortex-a53lpsci @*7@IV cpu@3cpu2arm,cortex-a53lpsci @*7@IV l2-cache02cache @opp-table2operating-points-v2opp-1200000000G PIopp-1600000000_^~Iopp-1800000000kIB@ Iclock-osc-32k 2fixed-clock!1osc_32kclock-osc-24m 2fixed-clock!n61osc_24mclock-ext1 2fixed-clock!k@ 1clk_ext1clock-ext2 2fixed-clock!k@ 1clk_ext2clock-ext3 2fixed-clock!k@ 1clk_ext3clock-ext4 2fixed-clock!k@ 1clk_ext4reserved-memory Ddsp@92400000@KBpmu2arm,cortex-a53-pmu Rpsci 2arm,psci-1.0smcthermal-zonescpu-thermal]stripstrip0Lpassivetrip1s criticalcooling-mapsmap00 soc-thermal]stripstrip0Lpassive trip1s criticalcooling-mapsmap0 0 timer2arm,armv8-timer0R   !zsoc@02fsl,imx8mp-socsimple-bus D>gssoc_unique_idbus@300000002fsl,aips-bussimple-bus0@ Dgpio@302000002fsl,imx8mp-gpiofsl,imx35-gpio0 R@A0gpio@302100002fsl,imx8mp-gpiofsl,imx35-gpio0!RBC#'gpio@302200002fsl,imx8mp-gpiofsl,imx35-gpio0"RDE 8gpio@302300002fsl,imx8mp-gpiofsl,imx35-gpio0#RFGR  gpio@302400002fsl,imx8mp-gpiofsl,imx35-gpio0$RHIrtmu@302600002fsl,imx8mp-tmu0&!watchdog@302800002fsl,imx8mp-wdtfsl,imx21-wdt0( RN7okay>defaultLVwatchdog@302900002fsl,imx8mp-wdtfsl,imx21-wdt0) RO 7disabledwatchdog@302a00002fsl,imx8mp-wdtfsl,imx21-wdt0* R  7disabledpinctrl@303300002fsl,imx8mp-iomuxc03fecgrphkX\|`dhltpx|P.flexspi0grpk@DX\`d,i2c1grp0k`@d@i2c1gpiogrp0k`dpmicirqgrpkAusdhc3grpk$( h lpt| L$P(T,H0)usdhc3-100mhzgrpk$( h lpt| L$P(T,H0*usdhc3-200mhzgrpk$( h lpt| L$P(T,H0+wdoggrpk|eqosgrphkTX|xthd`\lp2i2c2grp0kh@ l@!i2c2gpiogrp0kh l"regusdhc2vmmcgrpk8@Cuart1grp0k @$@usdhc2-gpiogrpk$usdhc2grpk $(,04$#usdhc2-100mhzgrpk $(,04$%usdhc2-200mhzgrpk $(,04$&iomuxc-gpr@303400002fsl,imx8mp-iomuxc-gprsyscon04efuse@30350000)2fsl,imx8mp-ocotpfsl,imx8mm-ocotpsyscon05 unique-id@420speed-grade@10mac-address@90-mac-address@961anatop@30360000+2fsl,imx8mp-anatopfsl,imx8mm-anatopsyscon06snvs@30370000#2fsl,sec-v4.0-monsysconsimple-mfd07snvs-rtc-lp2fsl,sec-v4.0-mon-rtc-lpt{4R snvs-rtcsnvs-powerkey2fsl,sec-v4.0-pwrkeyt R snvs-pwrkeyt7okayclock-controller@303800002fsl,imx8mp-ccm084osc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4HB ghlH88,A8@88$;/eׄ/preset-controller@303900002fsl,imx8mp-srcsyscon09 RYgpc@303a00002fsl,imx8mp-gpc0:pgc power-domain@05power-domain@1;power-domain@29power-domain@3:power-domain@6=power-domain@7fef88/ׄpower-domain@9 4<power-domain@10  4power-domain@166power-domains@177 7@e8power-domain@187bus@304000002fsl,aips-bussimple-bus0@@ Dpwm@306600002fsl,imx8mp-pwmfsl,imx27-pwm0f RQipgper 7disabledpwm@306700002fsl,imx8mp-pwmfsl,imx27-pwm0g RRipgper 7disabledpwm@306800002fsl,imx8mp-pwmfsl,imx27-pwm0h RSipgper 7disabledpwm@306900002fsl,imx8mp-pwmfsl,imx27-pwm0i RTipgper 7disabledtimer@306a00002nxp,sysctr-timer0j R/perbus@308000002fsl,aips-bussimple-bus0@ Dspi@30820000 !2fsl,imx8mp-ecspifsl,imx51-ecspi0 Ripgper  %rxtx 7disabledspi@30830000 !2fsl,imx8mp-ecspifsl,imx51-ecspi0 R ipgper  %rxtx 7disabledspi@30840000 !2fsl,imx8mp-ecspifsl,imx51-ecspi0 R!ipgper  %rxtx 7disabledserial@308600002fsl,imx8mp-uartfsl,imx6q-uart0 Ripgper  %rxtx7okay>defaultLserial@308800002fsl,imx8mp-uartfsl,imx6q-uart0 Ripgper  %rxtx 7disabledserial@308900002fsl,imx8mp-uartfsl,imx6q-uart0 Ripgper  %rxtx 7disabledcan@308c00002fsl,imx8mp-flexcan0 Rnipgpert0bZ/ > 7disabledcan@308d00002fsl,imx8mp-flexcan0 Rnipgperu0bZ/ > 7disabledcrypto@30900000 2fsl,sec-v4.0 0 D0 R[kn aclkipgjr@10002fsl,sec-v4.0-job-ring Rijr@20002fsl,sec-v4.0-job-ring  Rjjr@30002fsl,sec-v4.0-job-ring0 Rri2c@30a200002fsl,imx8mp-i2cfsl,imx21-i2c 0 R#7okay! >defaultgpioLL V `pmic@25% 2nxp,pca9450c>defaultL RregulatorsBUCK1jBUCK1 '!` 5BUCK2jBUCK2 '!` 5~ PBUCK4jBUCK4 '3@BUCK5jBUCK5 '3@BUCK6jBUCK6 '3@LDO1jLDO1j2ZLDO2jLDO2 50LDO3jLDO3 52ZLDO4jLDO4 52ZLDO5jLDO5w@2Zeeprom@51 2atmel,24c32Q rtc@522microcrystal,rv3028R i2c@30a300002fsl,imx8mp-i2cfsl,imx21-i2c 0 R$7okay! >defaultgpioL!L" V `eeprom@51 2atmel,24c02Qleds@62 2nxp,pca9533bled1led2led3i2c@30a400002fsl,imx8mp-i2cfsl,imx21-i2c 0 R% 7disabledi2c@30a500002fsl,imx8mp-i2cfsl,imx21-i2c 0 R& 7disabledserial@30a600002fsl,imx8mp-uartfsl,imx6q-uart0 Ripgper  %rxtx 7disabledmailbox@30aa00002fsl,imx8mp-mufsl,imx6sx-mu0 RX5mailbox@30e600002fsl,imx8mp-mufsl,imx6sx-mu0 R5 7disabledAi2c@30ad00002fsl,imx8mp-i2cfsl,imx21-i2c 0 RL 7disabledi2c@30ae00002fsl,imx8mp-i2cfsl,imx21-i2c 0 RM 7disabledmmc@30b4000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 R_ ipgahbperAVf 7disabledmmc@30b5000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 R_ ipgahbperAVf7okay">defaultstate_100mhzstate_200mhzL#$L%$p&$ z' (mmc@30b6000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 R_ ipgahbperAVf7okayׄ">defaultstate_100mhzstate_200mhzL)L*p+spi@30bb00002nxp,imx8mp-fspi0fspi_basefspi_mmap Rk fspi_enfspiĴ 7okay>defaultL,flash@02jedec,spi-norĴdma-controller@30bd0000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0 Rkipgahbimx/sdma/sdma-imx7d.binethernet@30be0000-2fsl,imx8mp-fecfsl,imx8mq-fecfsl,imx6sx-fec00Rvwxy("ipgahbptpenet_clk_refenet_out ^ 6:;9sY@g- smac-address >7okay>defaultL. #rgmii-id,/7mdio ethernet-phy@02ethernet-phy-ieee802.3-c220RH]r/ethernet@30bf0000'2nxp,imx8mp-dwmac-eqossnps,dwmac-5.10a0Rmacirqeth_wake_irq stmmacethpclkptp_reftx^6:; sY@g1 smac-address7okay>defaultL2 #rgmii-id,3mdio2snps,dwmac-mdio ethernet-phy@12ethernet-phy-ieee802.3-c22H]r3bus@32c000002fsl,aips-bussimple-bus2@ Dblk-ctrl@32ec0000!2fsl,imx8mp-media-blk-ctrlsyscon2(4554464776Fbusmipi-dsi1mipi-csi1lcdif1isimipi-csi2lcdif2ispdwemipi-dsi2@ &apbaxicam1cam2disp1disp2ispphyabA8e blk-ctrl@32f10000 2fsl,imx8mp-hsio-blk-ctrlsyscon2$ usbpcie889:8;(bususbusb-phy1usb-phy2pciepcie-phy>gpu@38000000 2vivante,gc8 R 4fcoreshaderbusreg3488//<gpu@38008000 2vivante,gc8 Rf corebusreg58/=interrupt-controller@38800000 2arm,gic-v388  R memory-controller@3d4000002snps,ddrc-3.80a=@@ Rddr-pmu@3d800000%2fsl,imx8mp-ddr-pmufsl,imx8m-ddr-pmu=@ Rbusb-phy@381f00402fsl,imx8mp-usb-phy8@@phy> 7disabled?usb@32f101002fsl,imx8mp-dwc328   hsiosuspend R>  @@D 7disabledusb@38100000 2snps,dwc387bus_earlyrefsuspend R(??usb2-phyusb3-phyusb-phy@382f00402fsl,imx8mp-usb-phy8/@@phy> 7disabled@usb@32f101082fsl,imx8mp-dwc328/   hsiosuspend R>  @@D 7disabledusb@38200000 2snps,dwc38 7bus_earlyrefsuspend R)@@usb2-phyusb3-phydsp@3b6e80002fsl,imx8mp-dsp;n3txdb0txdb1rxdb0rxdb10>AAAAEB 7disabledmemory@40000000memory@chosen$S/soc@0/bus@30800000/serial@30860000regulator-usdhc22regulator-fixed>defaultLC_VSD_3V32Z2Z n'sd.( interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5mmc0mmc1mmc2serial0serial1serial2serial3spi0rtc0rtc1device_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachenvmem-cellsnvmem-cell-namesoperating-points-v2#cooling-cellscpu-supplyphandlecache-levelopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesrangesno-mapinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-ranges#thermal-sensor-cellsstatuspinctrl-namespinctrl-0fsl,ext-reset-outputfsl,pinsregmapoffsetclock-nameslinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-domains#pwm-cellsdmasdma-namesfsl,clk-sourcefsl,stop-modepinctrl-1sda-gpiosscl-gpiosregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-ramp-delaynxp,dvs-run-voltagenxp,dvs-standby-voltagepagesizetrickle-resistor-ohms#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthpinctrl-2cd-gpiosvmmc-supplynon-removablereg-namesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-width#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetti,rx-internal-delayti,tx-internal-delayti,fifo-depthti,clk-output-selti,min-output-impedanceenet-phy-lane-no-swapinterrupt-namesintf_modepower-domain-names#phy-cellsdma-rangesphysphy-namessnps,dis-u2-freeclk-exists-quirkmbox-namesmboxesmemory-regionstdout-pathregulator-namegpioenable-active-highstartup-delay-usoff-on-delay-us