t8n(n :,Toradex Colibri iMX8QXP/DX on Colibri Evaluation Board V3@2toradex,colibri-imx8x-eval-v3toradex,colibri-imx8xfsl,imx8qxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000 /vpu@2c000000/vpu-core@2d0a0000"/bus@5a000000/i2c@5a810000/rtc@68 /scu/rtccpus cpu@0cpu2arm,cortex-a35 psci+@=JW@iv  cpu@1cpu2arm,cortex-a35 psci+@=JW@iv cpu@2cpu2arm,cortex-a35 psci+@=JW@iv cpu@3cpu2arm,cortex-a35 psci+@=JW@iv l2-cache02cache -@?opp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3  QQ  ( reserved-memory 3decoder-boot@84000000 :encoder-boot@86000000 :decoder-rpc@92000000 :dsp@92400000 @:encoder-rpc@94400000 @p:pmu2arm,cortex-a35-pmu (psci 2arm,psci-1.0smcscu 2fsl,imx-scu Atx0rx0gip3$Limx8qx-pd2fsl,imx8qxp-scu-pdfsl,scu-pdSclock-controller2fsl,imx8qxp-clkgtxtal_32KHzxtal_24Mhzpinctrl2fsl,imx8qxp-iomuxcdefault  ad7879intgrp !)adc0grp0d`c`h`g`canintgrp @csictlgrp  extio0grp 1@fec1grpx5 4 &a%a'a(a-a.a/a0a=fec1slpgrpx5A4A&A%A'A(A-A.A/A0A>flexcan0grpj!i!flexcan1grpl!k!flexcan2grpn!m!gpioblongrp `gpiokeysgrp pADhog0grp8* a S a, a T a U aR a       X     hog1grp   hogscfwgrp  i2c0grp!!'i2c0mipilvds0grpt u i2c0mipilvds1grpx y i2c1grpv!w!,lcdifgrp,L`H`K`J``7``8`9`:`;`<`=`>`?`@`A`B`C`E`F`G`I`)`P`lpspi2grp0Y!Z@[@\@lpuart0grp0o p i j lpuart2grpr q !lpuart3grpm n #lpuart3ctrlgrpH{ V W    $pciebgrp$aa`pwmagrpa``pwmbgrp M`pwmcgrp N`pwmdgrpaO`sai0grp0^@a@]@_@sgtl5000grp Asgtl5000usbclkgrp e!(usb3503agrp ausbcdetgrp 3@usbh1reggrp @usdhc1grp A ! ! ! !!!!!!A!0usdhc1-100mhzgrp A ! ! ! !!!!!!A!1usdhc1-200mhzgrp A ! ! ! !!!!!!A!2usdhc2gpiogrp !6usdhc2gpioslpgrp `:usdhc2grpTA! !!!"!#!!5usdhc2-100mhzgrpTA! !!!"!#!!7usdhc2-200mhzgrpTA! !!!"!#!!8usdhc2slpgrpT`` `!`"`#`!9wifigrp  imx8qx-ocotp2fsl,imx8qxp-scu-ocotp scu-key"2fsl,imx8qxp-sc-keyfsl,imx-sc-keyt disabledrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermal timer2arm,armv8-timer0(   clock-xtal32k 2fixed-clockg xtal_32KHzclock-xtal24m 2fixed-clockgn6 xtal_24MHzthermal-zonescpu-thermal0 ctripstrip00<passive trip10< criticalcooling-mapsmap0G 0L bus@58000000 2simple-bus 3XXclock-img-ipg 2fixed-clockg  img_ipg_clkjpegdec@58400000 X@0(5678tperipg[k (2nxp,imx8qxp-jpgdecjpegenc@58450000 XE0(1234tperipg[k (2nxp,imx8qxp-jpgencclock-controller@585d00002fsl,imx8qxp-lpcg X]g0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clkclock-controller@585f00002fsl,imx8qxp-lpcg X_g0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clkvpu@2c000000 3,, , disabledmailbox@2d0000002fsl,imx6sx-mu - ( disabledmailbox@2d0200002fsl,imx6sx-mu - ( disabledmailbox@2d0400002fsl,imx6sx-mu - ( disabledvpu-core@2d080000 -2nxp,imx8q-vpu-decoder Atx0tx1rx$L disabledvpu-core@2d090000 - 2nxp,imx8q-vpu-encoder Atx0tx1rx$L disabledvpu-core@2d0a0000 - 2nxp,imx8q-vpu-encoder Atx0tx1rx$L disabledbus@59000000 2simple-bus 3YYclock-audio-ipg 2fixed-clockg'audio_ipg_clkclock-controller@595800002fsl,imx8qxp-lpcg YXg  4dsp_lpcg_adb_clkdsp_lpcg_ipg_clkdsp_lpcg_core_clkclock-controller@595900002fsl,imx8qxp-lpcg YYgdsp_ram_lpcg_ipg_clkdsp@596e80002fsl,imx8qxp-dsp Yntipgocramcore Atxdb0txdb1rxdb0rxdb10L disabledbus@5a000000 2simple-bus 3ZZclock-dma-ipg 2fixed-clockg' dma_ipg_clk%serial@5a060000 Z ( tipgbaud9okay2fsl,imx8qxp-lpuartdefaultserial@5a070000 Z ( tipgbaud: disabled2fsl,imx8qxp-lpuartserial@5a080000 Z (   tipgbaud;okay2fsl,imx8qxp-lpuartdefault!serial@5a090000 Z  ("" tipgbaud<okay2fsl,imx8qxp-lpuartdefault#$clock-controller@5a4600002fsl,imx8qxp-lpcg ZFg9%'uart0_lpcg_baud_clkuart0_lpcg_ipg_clk9clock-controller@5a4700002fsl,imx8qxp-lpcg ZGg:%'uart1_lpcg_baud_clkuart1_lpcg_ipg_clk:clock-controller@5a4800002fsl,imx8qxp-lpcg ZHg;%'uart2_lpcg_baud_clkuart2_lpcg_ipg_clk; clock-controller@5a4900002fsl,imx8qxp-lpcg ZIg<%'uart3_lpcg_baud_clkuart3_lpcg_ipg_clk<"i2c@5a800000 Z@ (&tper [`kn6`okay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c default'(touchscreen@2c 2adi,ad7879-1default) ,*(x-;i2c@5a810000 Z@ (+tper [akn6aokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c default,rtc@68 2st,m41t0 hi2c@5a820000 Z@ (-tper [bkn6b disabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a830000 Z@ (.tper [ckn6c disabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cclock-controller@5ac000002fsl,imx8qxp-lpcg Zg`% i2c0_lpcg_clki2c0_lpcg_ipg_clk`&clock-controller@5ac100002fsl,imx8qxp-lpcg Zga% i2c1_lpcg_clki2c1_lpcg_ipg_clka+clock-controller@5ac200002fsl,imx8qxp-lpcg Zgb% i2c2_lpcg_clki2c2_lpcg_ipg_clkb-clock-controller@5ac300002fsl,imx8qxp-lpcg Zgc% i2c3_lpcg_clki2c3_lpcg_ipg_clkc.bus@5b000000 2simple-bus 3[[clock-conn-axi 2fixed-clockgCU conn_axi_clkBclock-conn-ahb 2fixed-clockg ! conn_ahb_clkclock-conn-ipg 2fixed-clockg conn_ipg_clkAmmc@5b010000 ( [/// tipgperahbokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcS]kq"defaultstate_100mhzstate_200mhz0y12mmc@5b020000 ( [333 tipgperahbokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcS * 4(defaultstate_100mhzstate_200mhzsleep56y76869:mmc@5b030000 ( [;;; tipgperahb disabled"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcethernet@5b040000 [0( <<< <tipgahbenet_clk_refptp[k沀sY@okay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecdefaultsleep=y>rmii ?mdio ethernet-phy@22ethernet-phy-ieee802.3-c22%d ?ethernet@5b050000 [0( @@@ @tipgahbenet_clk_refptp[k沀sY@ disabled.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecclock-controller@5b2000002fsl,imx8qxp-lpcg [ gAB 9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clk/clock-controller@5b2100002fsl,imx8qxp-lpcg [!gAB 9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clk3clock-controller@5b2200002fsl,imx8qxp-lpcg ["gAB 9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clk;clock-controller@5b2300002fsl,imx8qxp-lpcg [#g0BAA enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clk<clock-controller@5b2400002fsl,imx8qxp-lpcg [$g0BAA enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clk@bus@5c000000 2simple-bus 3\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu \ (bus@5d000000 2simple-bus 3]]clock-lsio-mem 2fixed-clockg  lsio_mem_clkclock-lsio-bus 2fixed-clockg lsio_bus_clkCgpio@5d080000 ] (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d090000 ]  (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0a0000 ]  (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0b0000 ]  (/? 2fsl,imx8qxp-gpiofsl,imx35-gpio*gpio@5d0c0000 ]  (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0d0000 ]  (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0e0000 ] (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000 ] (/? 2fsl,imx8qxp-gpiofsl,imx35-gpiomailbox@5d1b0000 ] ( disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000 ] (-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1d0000 ] ( disabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000 ] ( disabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000 ] ( disabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000 ]  ( disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000 ]! ( disabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000 ]( (2fsl,imx8qxp-mufsl,imx6sx-muclock-controller@5d4000002fsl,imx8qxp-lpcg ]@g4Chpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clkclock-controller@5d4100002fsl,imx8qxp-lpcg ]Ag4Chpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clkclock-controller@5d4200002fsl,imx8qxp-lpcg ]Bg4Chpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clkclock-controller@5d4300002fsl,imx8qxp-lpcg ]Cg4Chpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clkclock-controller@5d4400002fsl,imx8qxp-lpcg ]Dg4Chpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clkclock-controller@5d4500002fsl,imx8qxp-lpcg ]Eg4Chpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clkclock-controller@5d4600002fsl,imx8qxp-lpcg ]Fg4Chpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clkclock-controller@5d4700002fsl,imx8qxp-lpcg ]Gg4Chpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clkchosenK/bus@5a000000/serial@5a090000regulator-module-3v32regulator-fixedW+V3.3f2Z~2Z4gpio-keys 2gpio-keysdefaultDwakeupWake-Up *   interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3vpu_core0vpu_core1vpu_core2rtc0rtc1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapmbox-namesmboxes#power-domain-cells#clock-cellsclock-namespinctrl-namespinctrl-0fsl,pinslinux,keycodesstatustimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsclock-indices#mbox-cellsmemory-regiontouchscreen-max-pressureadi,resistance-plate-xadi,first-conversion-delayadi,acquisition-timeadi,median-filter-sizeadi,averagingadi,conversion-intervalbus-widthnon-removableno-sdno-sdiopinctrl-1pinctrl-2fsl,tuning-start-tapfsl,tuning-stepcd-gpiosvmmc-supplypinctrl-3disable-wpfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetmax-speedgpio-controller#gpio-cellsstdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltlabellinux,codedebounce-intervalwakeup-source