8( 1h ",pine64,quartz64-arockchip,rk35667Pine64 RK3566 Quartz64-A Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55psci%9Dcpu@100cpu,arm,cortex-a55psci%9Dcpu@200cpu,arm,cortex-a55psci%9Dcpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0firmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2D@opp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24mDxin32k ,fixed-clockxin32k  defaultsram@10f000 ,mmio-sram sram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob _*  /sata-phy9K  Ydisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob `* /sata-phy9K  Ydisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clk`host hutmi_wideK q xYokay* /usb2-phy high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clk`host * /usb2-phyusb3-phy hutmi_wideK q xYokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(Dusb@fd800000 ,generic-ehci  */usbYokayusb@fd840000 ,generic-ohci  */usbYokayusb@fd880000 ,generic-ehci  */usbYokayusb@fd8c0000 ,generic-ohci  */usbYokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdDio-domains&,rockchip,rk3568-pmu-io-voltage-domainYokay (6DR`syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucrunDclock-controller@fdd20000,rockchip,rk3568-cruxin24mn{ G D i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk default Yokayregulator@1c ,tcs,tcs4525vdd_cpu 50 2DDregulator-state-memOpmic@20,rockchip,rk817 { Hh mclk Hrk808-clkout1rk808-clkout2 default !"DvregulatorsDCDC_REG12 p+  qD vdd_logicregulator-state-mem[s DCDC_REG22 p+  qDvdd_gpuDAregulator-state-memODCDC_REG32Dvcc_ddrregulator-state-mem[DCDC_REG422Z2ZDvcc_3v3Dregulator-state-memOLDO_REG12w@w@ vcca1v8_pmuD{regulator-state-mem[sw@LDO_REG22   vdda_0v9regulator-state-memOLDO_REG32   vdda0v9_pmuregulator-state-mem[s LDO_REG422Z2Z vccio_acodecDregulator-state-memOLDO_REG52w@2Z vccio_sdDregulator-state-memOLDO_REG622Z2Z vcc3v3_pmuDregulator-state-mem[s2ZLDO_REG72w@w@vcc_1v8Dregulator-state-memOLDO_REG82w@w@ vcc1v8_dvpDregulator-state-memOLDO_REG92** vcc2v8_dvpregulator-state-memOBOOST2LK@LK@boostD"regulator-state-memOOTG_SWITCH otg_switchregulator-state-memOserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk##$ defaultYokaypwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk% default Ydisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk& default Ydisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk' default Ydisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk( default Ydisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller D power-domain@7  )power-domain@8  *+,power-domain@9   -./power-domain@10  012345power-domain@11  6power-domain@13  7power-domain@14  89:power-domain@15 ;<=>?gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpu gpubus%@K YokayADmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d   biuciuciu-driveciu-sampleрq reset Ydisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@     Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refq  stmmacethB"3CFDYYokay{   h  Ebinputozrgmii defaultFGHIJK  N 0Lmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22DLstmmac-axi-configDBrx-queues-configDCqueue0tx-queues-configDDqueue0qos@fe128000,rockchip,rk3568-qossyscon D)qos@fe138080,rockchip,rk3568-qossyscon D8qos@fe138100,rockchip,rk3568-qossyscon D9qos@fe138180,rockchip,rk3568-qossyscon D:qos@fe148000,rockchip,rk3568-qossyscon D*qos@fe148080,rockchip,rk3568-qossyscon D+qos@fe148100,rockchip,rk3568-qossyscon D,qos@fe150000,rockchip,rk3568-qossyscon D6qos@fe158000,rockchip,rk3568-qossyscon D0qos@fe158100,rockchip,rk3568-qossyscon D1qos@fe158180,rockchip,rk3568-qossyscon D2qos@fe158200,rockchip,rk3568-qossyscon D3qos@fe158280,rockchip,rk3568-qossyscon D4qos@fe158300,rockchip,rk3568-qossyscon D5qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D;qos@fe190280,rockchip,rk3568-qossyscon D<qos@fe190300,rockchip,rk3568-qossyscon D=qos@fe190380,rockchip,rk3568-qossyscon D>qos@fe190400,rockchip,rk3568-qossyscon D?qos@fe198000,rockchip,rk3568-qossyscon D7qos@fe1a8000,rockchip,rk3568-qossyscon D-qos@fe1a8080,rockchip,rk3568-qossyscon D.qos@fe1a8100,rockchip,rk3568-qossyscon D/mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b   biuciuciu-driveciu-sampleрq resetYokay1; LU defaultMNOP`Qlmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c   biuciuciu-driveciu-sampleрq resetYokay1;yR default STU`Vlspi@fe300000 ,rockchip,sfc0@ e x vclk_sfchclk_sfcW default Ydisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 { { } n6( | z y { }corebusaxiblocktimerYokay1`lspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk _ \Xtx defaultYYokayDi2s@fe410000,rockchip,rk3568-i2s-tdmA 5{ E IFqFq G K :mclk_txmclk_rxhclkXXrxtxq R S tx-mrx-m defaultZ[\]YokayDi2s@fe430000,rockchip,rk3568-i2s-tdmC 7 S W <mclk_txmclk_rxhclkXXtxrxq U V tx-mrx-m Ydisabledpdm@fe440000,rockchip,rk3568-pdmD L Z Ypdm_clkpdm_hclkX rx^_`abc defaultq Xpdm-m Ydisableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclkD#dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclkDXi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / H G i2cpclkd default  Ydisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 J I i2cpclke default  Ydisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 L K i2cpclkf default Yokayi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 N M i2cpclkg default  Ydisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 P O i2cpclkh default  Ydisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`    tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g R Qspiclkapb_pclk##txrx default ijk  Ydisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h T Sspiclkapb_pclk##txrx defaultlm  Ydisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i V Uspiclkapb_pclk##txrx default nop  Ydisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j X Wspiclkapb_pclk##txrx default qrs  Ydisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u  baudclkapb_pclk##tu defaultYokaybluetooth,brcm,bcm43438-btvlpo )w =w Ow default xyz^j{serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v #  baudclkapb_pclk##| defaultYokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w ' $baudclkapb_pclk##} default Ydisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x + (baudclkapb_pclk## ~ default Ydisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y / ,baudclkapb_pclk# #  default Ydisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 3 0baudclkapb_pclk# #  default Ydisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 7 4baudclkapb_pclk## default Ydisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ; 8baudclkapb_pclk## default Ydisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ? <baudclkapb_pclk## default Ydisabledthermal-zonescpu-thermalwdtripscpu_alert0ppassiveDcpu_alert1$passivecpu_crits criticalcpu_hotactiveDcooling-mapsmap00 map1 gpu-thermalwtripsgpu-thresholdppassivegpu-target$passiveDgpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq s{  f@ `  tsadcapb_pclkq   s initdefaultsleep Yokay  .Dsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]  saradcapb_pclkq  saradc-apb I Ydisabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn Z Y pwmpclk default Ydisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn Z Y pwmpclk default Ydisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  Z Y pwmpclk default Ydisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 Z Y pwmpclk default Ydisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ] \ pwmpclk default Ydisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ] \ pwmpclk default Ydisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ] \ pwmpclk default Ydisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ] \ pwmpclk default Ydisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp ` _ pwmpclk default Ydisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp ` _ pwmpclk default Ydisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  ` _ pwmpclk default Ydisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 ` _ pwmpclk default Ydisabledphy@fe830000,rockchip,rk3568-naneng-combphy" }  refapbpipe{"q  [ m YokayD phy@fe840000,rockchip,rk3568-naneng-combphy% ~  refapbpipe{%q  [ m  YdisabledDusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  YokayDhost-port YokayoDotg-port YokayoDusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  Yokayhost-port YokayoDotg-port YokayoDpinctrl,rockchip,rk3568-pinctrl  gpio@fdd60000,rockchip,gpio-bank !.   Dgpio@fe740000,rockchip,gpio-bankt " c d  gpio@fe750000,rockchip,gpio-banku # e f  Dwgpio@fe760000,rockchip,gpio-bankv $ g h  gpio@fe770000,rockchip,gpio-bankw % i j  Dpcfg-pull-up Dpcfg-pull-down Dpcfg-pull-none Dpcfg-pull-none-drv-level-1  Dpcfg-pull-none-drv-level-2  Dpcfg-pull-none-drv-level-3  Dpcfg-pull-up-drv-level-1  Dpcfg-pull-up-drv-level-2  Dpcfg-pull-none-smt  Dacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 D cpuebcedpdpemmceth0eth1flashfspifspi-pins` DWgmac0gmac1gmac1m0-miim DFgmac1m0-clkinout DJgmac1m0-rx-bus20    DHgmac1m0-tx-bus20  DGgmac1m0-rgmii-clk DIgmac1m0-rgmii-bus@ DKgpuhdmitxi2c0i2c0-xfer   Di2c1i2c1-xfer   Ddi2c2i2c2m0-xfer  Dei2c3i2c3m0-xfer Dfi2c4i2c4m0-xfer   Dgi2c5i2c5m0-xfer   Dhi2s1i2s1m0-lrcktx D[i2s1m0-mclk D!i2s1m0-sclktx DZi2s1m0-sdi0  D\i2s1m0-sdo0 D]i2s2i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk D^pdmm0-clk1 D_pdmm0-sdi0  D`pdmm0-sdi1  Dapdmm0-sdi2  Dbpdmm0-sdi3 Dcpmicpmic-int-l D pmupwm0pwm0m0-pins D%pwm1pwm1m0-pins D&pwm2pwm2m0-pins D'pwm3pwm3-pins D(pwm4pwm4-pins Dpwm5pwm5-pins Dpwm6pwm6-pins Dpwm7pwm7-pins Dpwm8pwm8m0-pins  Dpwm9pwm9m0-pins  Dpwm10pwm10m0-pins  Dpwm11pwm11m0-pins Dpwm12pwm12m0-pins Dpwm13pwm13m0-pins Dpwm14pwm14m0-pins Dpwm15pwm15m0-pins Drefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ DMsdmmc0-clk DNsdmmc0-cmd DOsdmmc0-det DPsdmmc1sdmmc1-bus4@ DSsdmmc1-clk DUsdmmc1-cmd DTsdmmc2spdifspdifm0-tx DYspi0spi0m0-pins0  Dkspi0m0-cs0 Dispi0m0-cs1 Djspi1spi1m1-pins0 Dmspi1m1-cs0 Dlspi2spi2m0-pins0 Dpspi2m0-cs0 Dnspi2m0-cs1 Dospi3spi3m0-pins0   Dsspi3m0-cs0 Dqspi3m0-cs1 Drtsadctsadc-shutorg Dtsadc-pin Duart0uart0-xfer D$uart1uart1m0-xfer   Dtuart1m0-ctsn Duuart2uart2m0-xfer D|uart3uart3m0-xfer D}uart4uart4m0-xfer D~uart5uart5m0-xfer Duart6uart6m0-xfer Duart7uart7m0-xfer Duart8uart8m0-xfer Duart9uart9m0-xfer Dvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h Dzbt-host-wake-l Dxbt-wake-l Dyledswork-led-enable-h Ddiy-led-enable-h Dusb2vcc5v0-usb20-host-en  Dsdio-pwrseqwifi-enable-h Dvcc_sdvcc-sd-h Dchosen "serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkinDEgpio_fan ,gpio-fan O .Dleds ,gpio-ledsled-work Awork-led Goff O default Uled-diy Adiy-led Gon O lheartbeat default Urk817-sound,simple-audio-card i2s Analog RK817 simple-audio-card,cpu simple-audio-card,codec vsdio-pwrseq,mmc-pwrseq-simplev ext_clock default d LK@ wDRspdif-dit,linux,spdif-ditDspdif-sound,simple-audio-card SPDIFsimple-audio-card,cpu simple-audio-card,codec vcc12v_dcin,regulator-fixed vcc12v_dcin2Dvbus,regulator-fixedvbus2LK@LK@DDvcc5v0_usb,regulator-fixed vcc5v0_usb2LK@LK@DDvcc5v0_usb20_host,regulator-fixed    defaultvcc5v0_usb20_hostLK@LK@DDvcc5v0_usb20_otg,regulator-fixed   vcc5v0_usb20_otgLK@LK@D"Dvcc3v3_sd,regulator-fixed   default2 vcc3v3_sd2Z2ZDDQvcc_sys,regulator-fixedvcc_sys2C#C#DDvcc_wl,regulator-fixedvcc_wl22Z2ZDDV interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendarm,smc-idshmem#clock-cellsinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsstatusdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendassigned-clock-parentsrockchip,system-power-controller#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usebus-widthcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104mmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathgpio-fan,speed-maplabeldefault-stateretain-state-suspendedlinux,default-triggersimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daipost-power-on-delay-mspower-off-delay-usreset-gpiosenable-active-highenable-active-low