8|( D ,radxa,rock3arockchip,rk35687Radxa ROCK3 Model Aaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55psci%9Dcpu@100cpu,arm,cortex-a55psci%9Dcpu@200cpu,arm,cortex-a55psci%9Dcpu@300cpu,arm,cortex-a55psci%9D opp-table-0,operating-points-v2LDopp-408000000WQ ^ 0l@opp-600000000W#F ^ 0opp-816000000W0, ^ 0}opp-1104000000WAʹ ^ 0opp-1416000000WTfr ^ 0opp-1608000000W_" ^0opp-1800000000WkI ^0opp-1992000000Wv ^000firmwarescmi ,arm,scmi-smc protocol@14Dopp-table-1,operating-points-v2DCopp-200000000W ^ opp-300000000W^ opp-400000000Wׄ^ opp-600000000W#F^ opp-700000000W)'^ opp-800000000W/^B@pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24mDxin32k ,fixed-clockxin32k  defaultsram@10f000 ,mmio-sram sram@0,arm,scmi-shmemDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@ satapmaliverxoob _*  /sata-phy9K  Ydisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob `* /sata-phy9K  Ydisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clk`otg hutmi_wideK q xYokay */usb2-phyusb3-phyusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@  ref_clksuspend_clkbus_clk`host * /usb2-phyusb3-phy hutmi_wideK q xYokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(Dusb@fd800000 ,generic-ehci  */usbYokayusb@fd840000 ,generic-ohci  */usbYokayusb@fd880000 ,generic-ehci  */usbYokayusb@fd8c0000 ,generic-ohci  */usbYokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdDio-domains&,rockchip,rk3568-pmu-io-voltage-domainYokay (6DRsyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconDsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdDsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconDsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconDsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀDclock-controller@fdd00000,rockchip,rk3568-pmucru`Dclock-controller@fdd20000,rockchip,rk3568-cruxin24m`m }G D i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk default Yokayregulator@1c ,tcs,tcs4525vdd_cpu 5 0!6Dregulator-state-memApmic@20,rockchip,rk809 m HZ mclk H default !q"""""""""DregulatorsDCDC_REG1 vdd_logic 6  p!qregulator-state-memADCDC_REG2vdd_gpu 6  p!qDDregulator-state-memADCDC_REG3vcc_ddr6regulator-state-memMDCDC_REG4vdd_npu 6  p!qregulator-state-memADCDC_REG5vcc_1v8w@ w@Dregulator-state-memALDO_REG1vdda0v9_image  regulator-state-memALDO_REG2 vdda_0v9  regulator-state-memALDO_REG3 vdda0v9_pmu  regulator-state-memMe LDO_REG4 vccio_acodec2Z 2ZDregulator-state-memALDO_REG5 vccio_sdw@ 2ZDregulator-state-memALDO_REG6 vcc3v3_pmu2Z 2ZDregulator-state-memMe2ZLDO_REG7 vcca_1v8w@ w@Dregulator-state-memALDO_REG8 vcca1v8_pmuw@ w@regulator-state-memMew@LDO_REG9vcca1v8_imagew@ w@regulator-state-memASWITCH_REG1vcc_3v3Dregulator-state-memASWITCH_REG2 vcc3v3_sdDTregulator-state-memAcodecserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk##$ default Ydisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk% default Ydisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk& default Ydisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk' default Ydisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk( default Ydisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller D power-domain@7  )power-domain@8  *+,power-domain@9   -./power-domain@10  012345power-domain@11  6power-domain@13  7power-domain@14  89:power-domain@15  ;<=>?@ABgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpu gpubus%CK YokayDDmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d   biuciuciu-driveciu-sampleрq  reset Ydisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@     Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refq   stmmacethE(9FLG_Yokaym  Z }sY@houtputuH rgmii-id defaultIJKLMmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22 defaultNN  ODHstmmac-axi-configDErx-queues-configDFqueue0tx-queues-configDGqueue0qos@fe128000,rockchip,rk3568-qossyscon D)qos@fe138080,rockchip,rk3568-qossyscon D8qos@fe138100,rockchip,rk3568-qossyscon D9qos@fe138180,rockchip,rk3568-qossyscon D:qos@fe148000,rockchip,rk3568-qossyscon D*qos@fe148080,rockchip,rk3568-qossyscon D+qos@fe148100,rockchip,rk3568-qossyscon D,qos@fe150000,rockchip,rk3568-qossyscon D6qos@fe158000,rockchip,rk3568-qossyscon D0qos@fe158100,rockchip,rk3568-qossyscon D1qos@fe158180,rockchip,rk3568-qossyscon D2qos@fe158200,rockchip,rk3568-qossyscon D3qos@fe158280,rockchip,rk3568-qossyscon D4qos@fe158300,rockchip,rk3568-qossyscon D5qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon D;qos@fe190280,rockchip,rk3568-qossyscon D?qos@fe190300,rockchip,rk3568-qossyscon D@qos@fe190380,rockchip,rk3568-qossyscon DAqos@fe190400,rockchip,rk3568-qossyscon DBqos@fe198000,rockchip,rk3568-qossyscon D7qos@fe1a8000,rockchip,rk3568-qossyscon D-qos@fe1a8080,rockchip,rk3568-qossyscon D.qos@fe1a8100,rockchip,rk3568-qossyscon D/mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b   biuciuciu-driveciu-sampleрq  resetYokay  (1 defaultPQRS<JTVmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c   biuciuciu-driveciu-sampleрq  reset Ydisabledspi@fe300000 ,rockchip,sfc0@ e x vclk_sfchclk_sfcU default Ydisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 m { }} n6( | z y { }corebusaxiblocktimerYokay  c defaultVWXYJVspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk _ \Zqtx default[ Ydisabledi2s@fe410000,rockchip,rk3568-i2s-tdmA 5m E I}FqFq G K :mclk_txmclk_rxhclkZZqrxtxq R S  tx-mrx-m default0\]^_`abcdefgYokay{Di2s@fe430000,rockchip,rk3568-i2s-tdmC 7 S W <mclk_txmclk_rxhclkZZqtxrxq U V  tx-mrx-m Ydisabledpdm@fe440000,rockchip,rk3568-pdmD L Z Ypdm_clkpdm_hclkZ qrxhijklm defaultq X pdm-m Ydisableddma-controller@fe530000,arm,pl330arm,primecellS@    apb_pclkD#dma-controller@fe550000,arm,pl330arm,primecellU@   apb_pclkDZi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / H G i2cpclkn default  Ydisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 J I i2cpclko default  Ydisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 L K i2cpclkp default  Ydisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 N M i2cpclkq default  Ydisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 P O i2cpclkr default  Ydisabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`    tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g R Qspiclkapb_pclk##qtxrx default stu  Ydisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h T Sspiclkapb_pclk##qtxrx default vwx  Ydisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i V Uspiclkapb_pclk##qtxrx default yz{  Ydisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j X Wspiclkapb_pclk##qtxrx default |}~  Ydisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u  baudclkapb_pclk## default Ydisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v #  baudclkapb_pclk## defaultYokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w ' $baudclkapb_pclk## default Ydisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x + (baudclkapb_pclk##  default Ydisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y / ,baudclkapb_pclk# #  default Ydisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 3 0baudclkapb_pclk# #  default Ydisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 7 4baudclkapb_pclk## default Ydisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ; 8baudclkapb_pclk## default Ydisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ? <baudclkapb_pclk## default Ydisabledthermal-zonescpu-thermaldtripscpu_alert0ppassiveDcpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermaltripsgpu-thresholdppassivegpu-target$passiveDgpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq sm  }f@ `  tsadcapb_pclkq   s initdefaultsleep.8BYokayXoDsaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]  saradcapb_pclkq   saradc-apbYokaypwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn Z Y pwmpclk default Ydisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn Z Y pwmpclk default Ydisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  Z Y pwmpclk default Ydisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 Z Y pwmpclk default Ydisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ] \ pwmpclk default Ydisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ] \ pwmpclk default Ydisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ] \ pwmpclk default Ydisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ] \ pwmpclk default Ydisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp ` _ pwmpclk default Ydisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp ` _ pwmpclk default Ydisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  ` _ pwmpclk default Ydisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 ` _ pwmpclk default Ydisabledphy@fe830000,rockchip,rk3568-naneng-combphy" }  refapbpipem"}q YokayD phy@fe840000,rockchip,rk3568-naneng-combphy% ~  refapbpipem%}q  YdisabledDusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m YokayDhost-portYokayDotg-portYokayDusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m Yokayhost-portYokayDotg-portYokayDpinctrl,rockchip,rk3568-pinctrl  gpio@fdd60000,rockchip,gpio-bank !.   Dgpio@fe740000,rockchip,gpio-bankt " c d  gpio@fe750000,rockchip,gpio-banku # e f  gpio@fe760000,rockchip,gpio-bankv $ g h  DOgpio@fe770000,rockchip,gpio-bankw % i j  pcfg-pull-up +Dpcfg-pull-none 8Dpcfg-pull-none-drv-level-1 8 EDpcfg-pull-none-drv-level-2 8 EDpcfg-pull-none-drv-level-3 8 EDpcfg-pull-up-drv-level-1 + EDpcfg-pull-up-drv-level-2 + EDpcfg-pull-none-smt 8 TDacodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 iD cpuebcedpdpemmcemmc-bus8 i  DVemmc-clk iDWemmc-cmd iDXemmc-datastrobe iDYeth0eth1flashfspifspi-pins` iDUgmac0gmac1gmac1m1-miim iDIgmac1m1-rx-bus20 i DKgmac1m1-tx-bus20 iDJgmac1m1-rgmii-clk iDLgmac1m1-rgmii-bus@ iDMgpuhdmitxi2c0i2c0-xfer i  Di2c1i2c1-xfer i  Dni2c2i2c2m0-xfer i Doi2c3i2c3m0-xfer iDpi2c4i2c4m0-xfer i  Dqi2c5i2c5m0-xfer i  Dri2s1i2s1m0-lrckrx iD_i2s1m0-lrcktx iD^i2s1m0-mclk iD!i2s1m0-sclkrx iD]i2s1m0-sclktx iD\i2s1m0-sdi0 i D`i2s1m0-sdi1 i Dai2s1m0-sdi2 i Dbi2s1m0-sdi3 iDci2s1m0-sdo0 iDdi2s1m0-sdo1 iDei2s1m0-sdo2 i Dfi2s1m0-sdo3 i Dgi2s2i2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk iDhpdmm0-clk1 iDipdmm0-sdi0 i Djpdmm0-sdi1 i Dkpdmm0-sdi2 i Dlpdmm0-sdi3 iDmpmicpmic_int iD pmupwm0pwm0m0-pins iD%pwm1pwm1m0-pins iD&pwm2pwm2m0-pins iD'pwm3pwm3-pins iD(pwm4pwm4-pins iDpwm5pwm5-pins iDpwm6pwm6-pins iDpwm7pwm7-pins iDpwm8pwm8m0-pins i Dpwm9pwm9m0-pins i Dpwm10pwm10m0-pins i Dpwm11pwm11m0-pins iDpwm12pwm12m0-pins iDpwm13pwm13m0-pins iDpwm14pwm14m0-pins iDpwm15pwm15m0-pins iDrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ iDPsdmmc0-clk iDQsdmmc0-cmd iDRsdmmc0-det iDSsdmmc1sdmmc2spdifspdifm0-tx iD[spi0spi0m0-pins0 i Duspi0m0-cs0 iDsspi0m0-cs1 iDtspi1spi1m0-pins0 i Dxspi1m0-cs0 iDvspi1m0-cs1 iDwspi2spi2m0-pins0 iD{spi2m0-cs0 iDyspi2m0-cs1 iDzspi3spi3m0-pins0 i  D~spi3m0-cs0 iD|spi3m0-cs1 iD}tsadctsadc-shutorg iDtsadc-pin iDuart0uart0-xfer iD$uart1uart1m0-xfer i  Duart2uart2m0-xfer iDuart3uart3m0-xfer iDuart4uart4m0-xfer iDuart5uart5m0-xfer iDuart6uart6m0-xfer iDuart7uart7m0-xfer iDuart8uart8m0-xfer iDuart9uart9m0-xfer iDvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2etherneteth_phy_rst iDNledsled_user_en iDusbvcc5v0_usb_host_en iDvcc5v0_usb_hub_en iDvcc5v0_usb_otg_en iDsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ^* /sata-phy9K  Ydisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconDqos@fe190080,rockchip,rk3568-qossyscon D<qos@fe190100,rockchip,rk3568-qossyscon D=qos@fe190200,rockchip,rk3568-qossyscon D>ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@     Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refq   stmmaceth(9L_ Ydisabledmdio,snps,dwmac-mdio stmmac-axi-configDrx-queues-configDqueue0tx-queues-configDqueue0phy@fe820000,rockchip,rk3568-naneng-combphy |  refapbpipem}q YokayDchosen wserial2:1500000n8leds ,gpio-ledsled-0  heartbeat  heartbeat defaultrk809-sound,simple-audio-card i2s Analog RK809 simple-audio-card,cpu simple-audio-card,codec vcc12v-dcin,regulator-fixed vcc12v_dcinDvcc3v3-sys,regulator-fixed vcc3v3_sys2Z 2Z6D"vcc5v0-sys,regulator-fixed vcc5v0_sysLK@ LK@6Dvcc5v0-usb,regulator-fixed vcc5v0_usbLK@ LK@6Dvcc5v0-usb-host,regulator-fixed   defaultvcc5v0_usb_hostLK@ LK@6Dvcc5v0-usb-hub-regulator,regulator-fixed   defaultvcc5v0_usb_hub6vcc5v0-usb-otg-regulator,regulator-fixed   defaultvcc5v0_usb_otgLK@ LK@6D interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendarm,smc-idshmem#clock-cellsinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsstatusdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendassigned-clock-parentsrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltmic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usebus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplyvbus-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathfunctioncolorlinux,default-triggersimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daienable-active-highgpio