?8(#cubietech,cubieboard7actions,s700 + 7CubieBoard7cpus+cpu@0=cpuarm,cortex-a53IMpsci[cpu@1=cpuarm,cortex-a53IMpsci[cpu@2=cpuarm,cortex-a53IMpsci[cpu@3=cpuarm,cortex-a53IMpsci[reserved-memory+csecmon@1f000000Ijpsci arm,psci-0.2Tsmcarm-pmuarm,cortex-a53-pmu0q|timerarm,armv8-timer0q   hosc fixed-clockn6[losc fixed-clock[soc simple-bus+cinterrupt-controller@e00f1000 arm,gic-400@I @ `  q [serial@e0120000#actions,s900-uartactions,owl-uartI $ q disabledserial@e0122000#actions,s900-uartactions,owl-uartI % q disabledserial@e0124000#actions,s900-uartactions,owl-uartI@ & q disabledserial@e0126000#actions,s900-uartactions,owl-uartI` ' q okayserial@e0128000#actions,s900-uartactions,owl-uartI ( q! disabledserial@e012a000#actions,s900-uartactions,owl-uartI ) q" disabledserial@e012c000#actions,s900-uartactions,owl-uartI * q# disabledclock-controller@e0168000actions,s700-cmuI[i2c@e0170000actions,s700-i2cI2 q+okaydefault i2c@e0174000actions,s700-i2cI@3 q+okaydefault i2c@e0178000actions,s700-i2cI4 q+ disableddefault i2c@e017c000actions,s700-i2cI5 q+ disabledpower-controller@e01b0100actions,s700-spsItimer@e024c000actions,s700-timerI$@ q timer1pinctrl@e01b0000actions,s700-pinctrlI)9 E<q$%&'([ i2c0_default[ pinmux Qi2c0_mfpXi2c0pinconfai2c0_sclki2c0_sdatafi2c1_default[ pinmux Qi2c1_dummyXi2c1pinconfai2c1_sclki2c1_sdatafi2c2_default[ pinmux Qi2c2_dummyXi2c2pinconfai2c2_sclki2c2_sdatafaliasess/soc/serial@e0126000chosen{serial3:115200n8memory@0=memoryImemory@1,e0000000=memoryI compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodphandlerangesno-mapinterruptsinterrupt-affinityclock-frequency#clock-cellsinterrupt-controller#interrupt-cellsclocksstatus#reset-cellspinctrl-namespinctrl-0#power-domain-cellsinterrupt-namesgpio-controllergpio-ranges#gpio-cellsgroupsfunctionpinsbias-pull-upserial3stdout-path